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| january 2010 ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet FSEZ1016A primary-side-regulation pwm integrated power mosfet features ? constant-voltage (cv) and constant-current (cc) control without secondary-feedback circuitry ? accurate constant current achieved by fairchild?s proprietary truecurrent ? technique ? green mode: frequency reduction at light-load ? fixed pwm frequency at 43khz with frequency hopping to reduce emi ? low startup current: 10 a maximum ? low operating current: 3.5ma ? peak-current-mode control in cv mode ? cycle-by-cycle current limiting ? over-temperature protection (otp) with auto-restart ? brownout protection with auto-restart ? v dd over-voltage protection (ovp) with auto-restart ? v dd under-voltage lockout (uvlo) ? soic-7 package applications ? battery chargers for cellular phones, cordless phones, pdas, digital cameras, power tools ? replaces linear transformer and rcc smps ? offline high brightness (hb) led drivers related resources ? an-6067 design guide for fan100/102 and FSEZ1016A/1216 description this primary-side pwm integrated power mosfet significantly simplifies power supply designs that require cv and cc regulation capabilities. FSEZ1016A controls the output voltage and current precisely with only the information in the primary side of the power supply, not only removing the output current sensing loss, but also eliminating all secondary feedback circuitry. the green-mode function with a low startup current (10a) maximizes the light-load efficiency so the power supply can meet stringent standby power regulations. compared with conventional secondary-side regulation approach; the FSEZ1016A can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. FSEZ1016A is available in a 7-pin soic package. a typical output cv/cc characteristic envelope is shown in figure 1. figure 1. typical output v-i characteristic ordering information part number operating temperature range mosfet bv dss mosfet r ds(on) eco status package packing method FSEZ1016Amy -40c to +125c 600v 9.3 (typical) green 7-lead, small outline integrated circuit package (soic) tape & reel for fairchild?s definition of eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html .
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 2 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet application diagram n p n s r sn1 c sn1 v dl + - ac line d sn d r c o n a c dd bridge rectifier diode v o c dl cs comi comv drain vdd gnd vs r start r sn2 c sn2 FSEZ1016A i o r s1 r s2 c s r cs r comv c comv r comi c comi d dd 1 2 3 4 5 6 8 figure 2. typical application internal block diagram figure 3. functional block diagram ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 3 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet marking information zxytt ez1016a tpm figure 4. top mark pin configuration figure 5. pin configuration pin definitions pin # name description 1 cs current sense . this pin connects a current sense resistor to sense the mosfet current for peak-current-mode control in cv mode and provides for output-current regulation in cc mode. 2 gnd ground . 3 comi constant current loop compensation . this pin connects a capacitor and a resistor between comi and gnd for compensation current loop gain. 4 comv constant voltage loop compensation . this pin connects a capacitor and a resistor between comv and gnd for compensation voltage loop gain. 5 vs voltage sense . this pin detects the output voltage information and discharge time base on voltage of auxiliary winding. this pin connected two divider resistors and one capacitor. 6 vdd supply . the power supply pin. ic operating current and mosfet driving current are supplied using this pin. this pin is connected to an external v dd capacitor of typically 10f. the threshold voltages for startup and turn-off are 16v and 5v, respectively. the operating current is lower than 5ma. 7 nc no connection. 8 drain drain . this pin is the high-voltage power mosfet drain. f - fairchild logo z - plant code x ? 1-digit year code y ? 1-digit week code tt ? 2-digit die run code t - package type (m=soic) p - y: green package m - manufacture flow code ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 4 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v dd dc supply voltage (1,2) 30 v v vs vs pin input voltage -0.3 7.0 v v cs cs pin input voltage -0.3 7.0 v v comv voltage-error amplifier output voltage -0.3 7.0 v v comi voltage-error amplifier output voltage -0.3 7.0 v v ds drain-source voltage 600 v i d continuous drain current t c =25c 1.0 a t c =100c 0.6 a i dm pulsed drain current 4 a e as single pulse avalanche energy 33 mj i ar avalanche current 1 a p d power dissipation (t a 50c) 660 mw ja thermal resistance (junction-to-air) 153 c/w jc thermal resistance (junction-to-case) 39 c/w t j operating junction temperature -40 +150 c t stg storage temperature range -55 +150 c t l lead temperature (wave soldering or ir, 10 seconds) +260 c esd electrostatic discharge capability human body model, jedec: jesd22-a114 2 kv charged device model, jedec: jesd22-c101 2 notes: 1. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. 2. all voltage values, except differential voltages, are given with respect to gnd pin. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter conditions min. typ. max. unit t a operating ambient temperature -40 +125 c ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 5 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet electrical characteristics v dd =15v and t a =-40c~+125c (t a =t j ), unless otherwise specified. symbol parameter conditions min. typ. max. units v dd section v op continuously-operating voltage 25 v v dd-on turn-on threshold voltage 15 16 17 v v dd-off turn-off threshold voltage 4.5 5.0 5.5 v i dd-st startup current 0 ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 7 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet typical performance characteristics 15 15.4 15.8 16.2 16.6 17 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) v dd-on (v) 4.5 4.7 4.9 5.1 5.3 5.5 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) v dd-off (v) figure 6. turn-on threshold voltage (v dd-on ) vs. temperature figure 7. turn-off threshold voltage (v dd-off ) vs. temperature 2.5 2.9 3.3 3.7 4.1 4.5 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) i dd-op (ma) 39 40 41 42 43 44 45 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) f osc (khz) figure 8. operating current (i dd-op ) vs. temperature figure 9. center frequency ( f osc ) vs. temperature 2.475 2.485 2.495 2.505 2.515 2.525 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) v vr (v) 2.475 2.485 2.495 2.505 2.515 2.525 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) v ir (v) figure 10. reference voltage (v vr ) vs. temperature figure 11. reference voltage (v ir ) vs. temperature ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 8 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet typical performance characteristics (continued) 400 440 480 520 560 600 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) f osc-n-min (hz) 15 17 19 21 23 25 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) f osc-cm-min (khz) figure 12. minimum frequency at no load (f osc-n-min ) vs. temperature figure 13. minimum frequency at ccm ( f osc-cm-min ) vs. temperature 0 5 10 15 20 25 30 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) s g (khz/v) 800 900 1000 1100 1200 1300 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) t min-n (ns) figure 14. green-mode frequenc y decreasing rate (s g ) vs. temperature figure 15. minimum on-time at no-load (t min-n ) vs. temperature 0 1 2 3 4 5 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) v n (v) 0 0.2 0.4 0.6 0.8 1 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) v g (v) figure 16. green-mode starting voltage on comv pin (v n ) vs. temperature figure 17. green-mode ending voltage on comv pin (v g ) vs. temperature ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 9 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet typical performance characteristics (continued) 80 83 86 89 92 95 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) i v-sink ( a) 75 79 83 87 91 95 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) i v-source ( a) figure 18. output sink current (i v-sink ) vs. temperature figure 19. output source current (i v-source ) vs. temperature 50 53 56 59 62 65 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) i i-sink ( a) 50 53 56 59 62 65 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) i i-source ( a) figure 20. output sink current (i i-sink ) vs. temperature figure 21. output source current (i i-source ) vs. temperature 500 550 600 650 700 750 800 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) bv dss (v) 60 64 68 72 76 80 -40 -30 -15 0 25 50 75 85 100 125 temperature (oc) dcy max (%) figure 22. drain-source breakdown voltage (bv dss ) vs. temperature figure 23. maximum duty cycle (dc y max ) vs. temperature ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 10 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet functional description figure 24 shows the basic circuit diagram of a primary- side regulated flyback converter, with typical waveforms shown in figure 25. generally, discontinuous conduction mode (dcm) operation is preferred for primary-side regulation because it allows better output regulation. the operation principles of dcm flyback converter are as follows: during the mosfet on time (t on ), input voltage (v dl ) is applied across the primary-side inductor (l m ). then mosfet current (i ds ) increases linearly from zero to the peak value (i pk ). during this time, the energy is drawn from the input and stored in the inductor. when the mosfet is turned off, the energy stored in the inductor forces the rectifier diode (d) to turn on. while the diode is conducting, the output voltage (v o ), together with diode forward-voltage drop (v f ), are applied across the secondary-side inductor ( l m n s 2 / n p 2 ) and the diode current (i d ) decreases linearly from the peak value (i pk n p /n s ) to zero. at the end of inductor current discharge time (t dis ), all the energy stored in the inductor has been delivered to the output. when the diode current reaches zero, the transformer auxiliary winding voltage (v w ) begins to oscillate by the resonance between the primary-side inductor (l m ) and the effective capacitor loaded across mosfet. during the inductor current discharge time, the sum of output voltage and diode forward-voltage drop is reflected to the auxiliary winding side as (v o +v f ) n a /n s . since the diode forward-voltage drop decreases as current decreases, the auxiliary winding voltage reflects the output voltage best at the end of diode conduction time where the diode current diminishes to zero. by sampling the winding voltage at the end of the diode conduction time, the output voltage information can be obtained. the internal error amplifier for output voltage regulation (ea_v) compares the sampled voltage with internal precise reference to generate error voltage (v comv ), which determines the duty cycle of the mosfet in cv mode. meanwhile, the output current can be estimated using the peak drain current and inductor current discharge time since output current is the same as the average of the diode current in steady state. the output current estimator detects the peak value of the drain current by a peak detection circuit and calculates the output current by the inductor discharge time (t dis ) and switching period (t s ). this output information is compared with the internal precise reference to generate error voltage (v comi ), which determines the duty cycle of the mosfet in cc mode. with fairchild?s innovative technique truecurrent?, constant current (cc) output can be precisely controlled. of the two error voltages, v comv and v comi , the smaller determines the duty cycle. during constant voltage regulation mode, v comv determines the duty cycle while v comi is saturated to high. during constant current regulation mode, v comi determines the duty cycle while v comv is saturated to high. + v dl - l m + v o - n p :n s i ds i d d primary-side regulation controller + v w - v dd v s cs +v f - n a l o a d i o i o estimator v o estimator t dis detector pwm control r cs v ac ref ref ea_v ea_i v comv v comi r s1 r s2 figure 24. simplified psr flyback converter circuit i ds (mosfet drain-to-source current) t dis t on t s i d (diode current) v w (auxiliary winding voltage) p pk s n i n ? pk i . davg o ii = a f s n v n ? a o s n v n ? figure 25. key waveforms of dcm flyback converter ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 11 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet temperature compensation built-in temperature compensation provides constant voltage regulation over a wide range of temperature variation. this internal compensation current compensates the forward-voltage drop variation of the secondary-side rectifier diode. green-mode operation the FSEZ1016A uses voltage regulation error amplifier output (v comv ) as an indicator of the output load and modulates the pwm frequency, as shown in figure 26, such that the switching frequency decreases as load decreases. in heavy-load conditions, the switching frequency is fixed at 43khz. once v comv decreases below 2.8v, the pwm frequency starts to linearly decrease from 43khz to 550hz to reduce the switching losses. as v comv decreases below 0.8v, the switching frequency is fixed at 550hz and FSEZ1016A enters ?deep green? mode, where the operating current drops to 1ma, reducing the standby power consumption. figure 26. switching frequency in green mode leading-edge blanking (leb) at the instant the mosfet is turned on, there is a high- current spike through the mosfet, caused by primary- side capacitance and secondary-side rectifier reverse recovery. excessive voltage across the r cs resistor can lead to premature turn-off of the mosfet. FSEZ1016A employs an internal leading-edge blanking (leb) circuit to inhibit the pwm comparator for a short time after the mosfet is turned on. external rc filtering is not required. frequency hopping emi reduction is accomplished by frequency hopping, which spreads the energy over a wider frequency range than the bandwidth measured by the emi test equipment. FSEZ1016A has an internal frequency- hopping circuit that changes the switching frequency between 40.4khz and 45.6khz with a period of 3ms, as shown in figure 27. figure 27. frequency hopping startup figure 28 shows the typical startup circuit and transformer auxiliary winding for a FSEZ1016A application. before FSEZ1016A begins switching, it consumes only startup current (typically 10 a) and the current supplied through the startup resistor charges the v dd capacitor (c dd ). when v dd reaches turn-on voltage of 16v (v dd-on ), FSEZ1016A begins switching, and the current consumed increases to 3.5ma. then, the power required for FSEZ1016A is supplied from the transformer auxiliary winding. the large hysteresis of v dd provides more hold-up time, which allows using a small capacitor for v dd . np v dl + - ac line 1 n a c dd c dl cs comi comv drain vdd gnd vs r start 8 6 5 2 3 4 FSEZ1016A r s1 r s2 d dd figure 28. startup circuit swi tc hing frequen cy 43 khz 550h z v comv 2 . 8v 0 . 8 v g r een mod e no rmal mode dee p g r ee n mode t s t s t s g ate d r ive s ignal f s 3ms t 45.6khz 40 . 4khz 43 . 0k hz ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 12 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet protections the FSEZ1016A has several self-protective functions, such as over-voltage protection (ovp), over- temperature protection (otp), and brownout protection. all the protections are implemented as auto- restart mode. when the auto-restart protection is triggered, switching is terminated and the mosfet remains off. this causes v dd to fall. when v dd reaches the v dd turn-off voltage of 5v, the current consumed by FSEZ1016A reduces to the startup current (maximum 10a) and the current supplied startup resistor charges the v dd capacitor. when v dd reaches the turn-on voltage of 16v, FSEZ1016A resumes normal operation. in this manner, the auto-restart alternately enables and disables the switching of the mosfet until the fault condition is eliminated ( see figure 29 ). fault situation 5v 16v v dd v ds fault occurs fault removed normal operation normal operation power on operating current 3.5ma 10a figure 29. auto-restart operation v dd over-voltage protection (ovp) v dd over-voltage protection prevents damage from over- voltage conditions. if the v dd voltage exceeds 28v by open-feedback condition, ovp is triggered. the ovp has a debounce time (typical 250s) to prevent false triggering by switching noise. it also protects other switching devices from over voltage. over-temperature protection (otp) a built-in temperature-sensing circuit shuts down pwm output if the junction temperature exceeds 140c. brownout protection FSEZ1016A detects the line voltage using auxiliary winding voltage since the auxiliary winding voltage reflects the input voltage when the mosfet is turned on. the vs pin is clamped at 1.15v while the mosfet is turned on and brownout protection is triggered if the current out of the vs pin is less than i vs-uvp (typical 180 a) during the mosfet conduction. pulse-by-pulse current limit when the sensing voltage across the current sense resistor exceeds the internal threshold of 1.3v, the mosfet is turned off for the remainder of the switching cycle. in normal operation, the pulse-by-pulse current limit is not triggered since the peak current is limited by the control loop. ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 13 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet typical application circuit (primary-side regulated offline led driver) application fairchild devices input voltage range output offline led driver FSEZ1016A 90~265v ac 12v/0.35a (4.2w) features ? high efficiency (>74% at full load) ? tight output regulation (cc: 5%) 70 71 72 73 74 75 76 77 78 79 80 90 120 150 180 210 240 270 line voltage (vac) efficiency (%) 0 2 4 6 8 10 12 14 16 18 0 50 100 150 200 250 300 350 400 output current (ma) output voltage (v) ac90v ac120v ac230v ac264v figure 30. measured efficiency and output regulation figure 31. schematic of typical a pplication circuit ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 14 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet typical application circuit (continued) transformer specification ? core: ee16 ? bobbin: ee16 figure 32. transformer diagram pin specifications remark primary-side inductance 2 1 1.95mh 8% 100khz, 1v primary-side effective leakage 2 1 60 h maximum short one of the secondary windings ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 15 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet physical dimensions 8 0 see detail a notes: a) this package conforms to jedec ms-012 variation aa except for missing pin 7. b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) drawing filename: m07arev2 land pattern recommendation seating plane 0.10 c c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 c m ba 0.25 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge figure 33. 7-lead, small-outline integrated circuit package (soic) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSEZ1016A ? rev. 1.0.2 16 FSEZ1016A ? primary-side-regulati on pwm integrated power mosfet |
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